Abstract

A single chip system for real-time encoding and decoding for MPEG2, except for motion estimation, can be created by integrating two 250 MHz dual issue RISC processor cores with a small dedicated hardware for the variable length encoding/decoding (VLC/VLD) and block loading process. The estimated area for the encoder, 27.7 mm/sup 2/ using a 0.3-micrometer CMOS process, is 20% smaller than that of the dedicated hardware approach. An approach that uses dual issue RISC processors has the advantage of a smaller chip area and also that of being very easy to program for multimedia applications.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.