Real-time FPGA-Based Outlier Detection using Autoencoder and LSTM

Abstract

The world we live in and the one we are designing for tomorrow is based on monitoring physical systems, specifically the capability of continuously gathering fine-grained information from the physical world using sensor networks. The ultimate goal of sensor networks goes beyond monitoring and data collection; they concern timely data analysis and near real-time accurate decision making. Outlier detection is one of the primary motivating data analysis applications in sensor networks. This paper proposes an FPGA-based two-stage hardware architecture for real-time outlier detection in time series data. A fine-tuned Autoencoder network is used to extract the latent features in data and a Long short-term memory (LSTM) network to predict and detect outliers in real-time. The architecture is validated using an open-source meteorological dataset collected using a multi-hop wireless sensor network (WSN). Experimental results on resource-constrained Xilinx PYNQ-Z1 board show that the proposed architecture can efficiently analyze and detect outliers in real-time. The 1.13 ms average latency and 0.21 W power consumption make it suitable for resource-constrained computing platforms.