Abstract
In this paper, a new implementation of an electronically tunable resistor-less floating inductance simulator using a second-generation voltage conveyor (VCII) is presented. The proposed circuit is resistor-free (benefiting from the intrinsic resistors at the Y terminals of the employed VCIIs) and composed of three VCIIs and a single grounded capacitor. Using a control current (Icon), the value of impedance at the Y terminal of the VCII is varied, whereby the value of the simulated inductance is tuned. The proposed circuit is designed at a transistor level using 0.18 µm TSMC CMOS parameters and ±0.9 V supply voltage. PSpice simulations are carried out to confirm the effectiveness of the proposed circuit. For a range of Icon from 0 µA to 50 µA, the value of the simulated L can be varied from −576 µH to −324 µH and from +316 µH to +576 µH for negative and positive simulators, respectively, in the frequency range of 100 kHz–3 MHz. Favorably, the value of the series resistance remains below 76 Ω. Simulation results show an error value below 4.8% and power consumption variation is from 1.64 mW to 1.92 mW. Moreover, application of the proposed circuit as a standard band-pass RLC filter is also included.
Highlights
In the integrated circuit technology, the use of inductors, especially with large values, is impractical, mainly due to the large-occupied area
Active building blocks (ABBs) along with capacitors and resistors are used to synthesize the equivalent of inductors in a specified frequency range
For those with electronic tuning capability, it is possible to adjust the value of simulated inductors electronically through a control current or voltage which is considered advantageous for providing full integration
Summary
In the integrated circuit technology, the use of inductors, especially with large values, is impractical, mainly due to the large-occupied area. Electronic tuning is performed through increasing the bias current, which sacrifices power consumption and the quality of the achieved inductor The latter occurs because, by increasing the bias current, the value of the parasitic resistors connected in parallel to the simulated inductor are reduced, which limits its overall performance. In [9], one dual output differential difference current conveyor (DO-DDCC), two resistors and one grounded capacitor are used to design a floating inductor simulator. In [11], an attempt is made to design a floating inductor simulator using active building blocks only, which utilizes one current controlled conveyor transconductance amplifier (CCCTA) and one operational amplifier (OA). The value of the simulated inductor is adjusted by a control current which is used to change the value of the Y terminal impedance of the used VCIIs. To provide low voltage operation, the Electronics 2022, 11, 312.
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