Abstract
The architecture design for a high-speed front-end video prefiltering is described, this being part of an effort to develop a real-time range-doppler digital SAR processor to produce image maps of the scanned area immediately as raw data are collected. The evolved architecture consists of three-dimensionally interconnected planes of modified transverse FIR parallel tapped elements. Both the range and azimuth prefilterings are performed simultaneously in a continuous input-output flow without the need to consider corner turning. The computation load has been reduced to one complex multiplication and two complex additions.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
