Abstract
Abstract Many vision applications require high-accuracy dense disparity maps in real time. Due to the complexity of the matching process, most real-time stereo applications rely on local algorithms in the disparity computation. These local algorithms generally suffer from matching ambiguities as it is difficult to find appropriate support for each pixel. Recent research shows that algorithms using adaptive cost aggregation approach greatly improve the quality of disparity map. Unfortunately, although these improvements are excellent, they are obtained at the expense of high computational. This article presents a hardware implementation for speeding up these methods. With hardware friendly approximation, we demonstrate the feasibility of implementing this expensive computational task on hardware to achieve real-time performance. The entire stereo vision system, includes rectification, stereo matching, and disparity refinement, is realized using a single field programmable gate array. The highly parallelized pipeline structure makes system be capable to achieve 51 frames per second for 640 × 480 stereo images. Finally, the success of accuracy improvement is demonstrated on the Middlebury dataset, as well as tests on real scene.
Highlights
Stereo vision has traditionally been and continues to be one of the most extensively investigated topics in computer vision
Ambrosch and Kubinger [44] proposed a stereo matching implementation that extends the Census Transform to gradient image and prepared to offer as an IP core for embedded real-time system. Another recent implementations was proposed by Jin et al [45], who designed a stereo matching system based on a Xilinx Virtex-4 field programmable gate array (FPGA), processing 640 × 480 images with block size 15 × 15 and a disparity range of 64 pixels
5 Experimental results and discussion The application of our hardware-based stereo vision system is mainly focus on robot navigation
Summary
Stereo vision has traditionally been and continues to be one of the most extensively investigated topics in computer vision. The remainder of this article is organized as follows: Section 2 introduces background of stereo vision and related works on real-time implementations, and Section 3 describes the adaptive support weights cost aggregation method with corresponding hardware-friendly approximation. Another recent implementations was proposed by Jin et al [45], who designed a stereo matching system based on a Xilinx Virtex-4 FPGA, processing 640 × 480 images with block size 15 × 15 and a disparity range of 64 pixels All these implementations mentioned above exhibit good real-time behavior, these two studies present a complete discussion of the accuracy of the algorithm on the Middlebury stereo datasets. 3.1 Hardware-friendly approximation In spite of the dramatic improvement of accuracy brought by adaptive support weight approach, it pays the cost of high computational complexity which makes it time-consuming and resource-intensive. We will show that our experimental results still have good performance in accuracy
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