Abstract
Parameter interpolation is more capable of modern computer numerical control (CNC) than traditional linear/circular interpolation with higher speed and higher precision. Most of non-uniform rational B-spline (NURBS) interpolation algorithms were developed based on the chord error and machines capability, where interpolation points are calculated beforehand to overcome acceleration/deceleration (acc/dec) and jerk problem, which needs large memory. In this paper, a NURBS interpolator based on feedrate section is proposed. Instead of a single interpolation point, this interpolator aims to feedrate section, which makes it possible to run on a digital signal processor or field programmable gate array (FPGA) whose memory is limited. Experiment on FPGA showed the performance of interpolation. A mould experiment verifies the feasibility of application.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: The International Journal of Advanced Manufacturing Technology
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
