Abstract
Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. The bottleneck towards achieving an efficient bio-electronic link is the real-time processing of neuronal signals, which imposes excessive requirements on bandwidth, energy and computation capacity. Here we present a unique concept where the intrinsic properties of memristive devices are exploited to compress information on neural spikes in real-time. We demonstrate that the inherent voltage thresholds of metal-oxide memristors can be used for discriminating recorded spiking events from background activity and without resorting to computationally heavy off-line processing. We prove that information on spike amplitude and frequency can be transduced and stored in single devices as non-volatile resistive state transitions. Finally, we show that a memristive device array allows for efficient data compression of signals recorded by a multi-electrode array, demonstrating the technology's potential for building scalable, yet energy-efficient on-node processors for brain-chip interfaces.
Highlights
Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications
We demonstrate how a large part of the computational burden associated with spike detection can be relegated to single memristive devices that can be accommodated in the back-endof-line of complementary metal-oxide semiconductor (CMOS) technologies, along with neuronal probe manufacturing
As originally proposed by Chua, memristors are capable of changing their resistive state as a function of the integral of their input voltage; a phenomenon known as resistive switching[25]
Summary
Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. Towards fully implantable autonomous systems, are hindered by real-time processing of the streamed neuronal signals, which would notably increase power dissipation along with dropping of signal-to-noise ratio (SNR)[12] Addressing these challenges necessitates the intelligent compression of big neural data generated[13] via on-node processing, currently pursued by shifting the spike detection and sorting task on-chip via template matching[6,14,15]. The resulting scalability issues, the drive for even further power budget reductions together with the consideration that neuroprosthetics have been successfully operated with simple, rate- or spike-count-coded input signals[16,17,18,19,20] have kindled interest in processing neuronal signals in a bio-inspired fashion This justifies current interest in leveraging emerging technologies for resurrecting Carver Mead’s original vision in neuromorphic systems[21], where efficient data processing is implemented for example through artificial retinas[22]. We demonstrate how a large part of the computational burden associated with spike detection can be relegated to single memristive devices that can be accommodated in the back-endof-line of complementary metal-oxide semiconductor (CMOS) technologies, along with neuronal probe manufacturing
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