Abstract
Si-strips are the baseline for the Forward Tracker Detector (FTD) of the International Linear Detector (ILD). The main element of the front-end electronics is a multi-channel ASIC for self-triggered detection and processing of low level charge signals. The architecture used in this chip is very similar to the typical structure of a Si-strip readout system presented in previous works. Nevertheless, some design modifications have been included to reduce the Equivalent Noise Charge (ENC).
Highlights
The electronic version of this AIDA Publication is available via the AIDA web site or on the CERN Document Server at the following URL:
A top-down design flow based on behavioural models is applied to this ASIC design
3. Pre-amp and shaper schematics designed with TSMC 65 nm Designed to reduce noise, area and power consumption Solved issues related to use non-ideal sources
Summary
The electronic version of this AIDA Publication is available via the AIDA web site or on the CERN Document Server at the following URL:
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