Abstract

AbstractA computer‐aided synthesis method is described for multi‐port RC networks with every capacitor having one terminal grounded and a resistor connected in general between every pair of nodes. The method utilizes an iterative minimization technique for the realization of short‐circuit admittance functions. A degree of flexibility in the topology is possible in that certain of the resistors can be eliminated. The synthesis method is particularly suitable for integrated circuits as it yields structures with the minimum value of total capacitance as well as the minimum number of capacitors.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call