Abstract
The proposed wearable biomedical device as given in Fig. 1.12 includes analog and noise sensitive blocks that should be supplied by LDO regulator in order to support a clean and a low voltage ripple. LDO regulators are widely utilized in PMU as they provide fast response, small area, and full integration. However, with the increase of process variation and the reduction of the supply voltage, the analog amplifier becomes challenging to design. As such, many research focus moves towards digital LDO (DLDO) regulator design as it can operate at a low supply voltage level. Yet digital logic circuits introduce more delay which affects the transient response. This chapter discusses the state of the art DLDO regulators in the literature. Then, we propose a DLDO regulator based on a ratioed logic comparator circuit that totally eliminates the digital loop delay. After that we present the simulation results in 22 nm FDSOI technology.
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