Rare event diagnosis by iterative failure region locating and elite learning sample selection

Abstract

Accurately estimating the failure region of rare events for nanoscale analog circuit blocks under process variations is a challenging task. In this paper, we propose a new statistical rare event analysis method. The new method is based on the iterative failure region locating scheme to reduce the sample counts while still maintains estimation accuracy. We derive the complete formulation for failure probability calculation in each iterative step. In addition, the new approach applies an elite learning sampling scheme, which considers both effectiveness of samples and well-coverage for process parameter search space, to further reduce number of samples after the gradual failure region locating at each iteration. As a result, the sample counts for simulation can be significantly reduced while sufficient representative samples are still kept for accurate failure probability analysis. Experiments were performed on the rise and fall time balancing failure analysis with Vth-NMOS, Vth-PMOS process parameters and the 4-gates logic circuit with 48 process parameters. The proposed method can deliver 228x faster than the conventional MC method with only 0.02-0.2% estimation errors. Furthermore, the new method estimates 20x more accurately with only 1.2x additional simulation costs than a recently published approach.