Rapid and low temperature micro inverted pyramid texturing of silicon via copper catalyzed chemical etching for high efficiency PEDOT:PSS/silicon hybrid solar cells

Abstract

Here, a rapid, low-temperature yet effective micro-inverted structuring of silicon (Si) via a low thermal budget copper catalyzed chemical etching (CuCCE) has been demonstrated for efficient hybrid heterojunction solar cells (HSCs) based on poly (3,4-ethylenedioxythiophene): poly(styrene sulfonate) (PEDOT:PSS)/Si in the basic device design ‘Ag/PEDOT:PSS/n-Si/In:Ga’. The inverted pyramidal (IP) arrays have been obtained on a large area of the partially polished (PP) Si surface by the CuCCE in etch bath consisting of Cu(NO3)2/HF/ H2O2 in 100 mM:4.5 M:1.5 M at room temperature (30 °C). The IP-Si shows significantly reduced total surface reflectance (<7 %) than the PP-Si (>30 %) for broad spectral range. The high efficiency device on the interconnected IP-Si surface shows power conversion efficiency (PCE) >10.75 % which is direct enhancement of ∼4 folds (absolute) when compared with the HSCs made on the PP-Si surface. Such high efficiency HSCs employing the CuCCE based inverted structured solar grade Si surface and detailed analyses of PEDOT:PSS/Si interface have rarely been addressed. The junction property has been studied with the help of Nyquist plots and Mott-Schottky (C-V) analyses of impedance sepctroscopy. A direct 2.9 fold enhancement in the recombination resistance along with high barrier potential found for the optimized IP-Si structured HSCs facilitated the improved junction and minimum recombination at the PEDOT:PSS/n-Si interface. The enhanced PCE is primarily attributed to improved light harvesting ability of the IP-Si surface, junction and passivation properties with conformal coverage of the PEDOT:PSS layer. The study will help to explore the high potential of the CuCCE based IP-Si surfaces for future high efficiency devices.