Abstract
Under the condition of meeting resolution, the SAR real-time imaging processor can satisfy the demands of the processing band through pre-filter and down-sample. Because of the special position in the signal processor, ranger pre-filter needs very high operation speed and better response performance. The principles of pre-filter and the methods to achieve the pre-filter are introduced in this paper. The study, focusing on the difference between ADSP-TS101S and XC4VSX35. FPGA in implementing the high performance filter, results that FPGA has the advantage over DSP. In conclusion, the results of the practical experiments are given to illuminate the rationality of the design
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