Random Telegraph Noise in Analog CMOS Circuits

Abstract

Flicker noise, or 1/f noise, is known to increase as devices scale down. However, as the scaling of MOS transistors advances, the effect of individual oxide defects, which originates flicker noise, becomes apparent through distinguishable discrete fluctuation in current. In such cases, flicker noise is recognizable as random telegraph noise (RTN). Another typical characteristic of RTN is that seemingly identical devices have different noise characteristics, as RTN variability from device to device also increases with scaling. Due to the large variability of RTN in highly-scaled devices, circuit yield must be evaluated during noise analysis. This work proposes a model to analyze the effect of RTN in analog circuits and to evaluate circuit yield. The model can be used in the traditional workflow of noise analysis. The model estimates the distribution of RTN power from the distribution of the noise spectral density. Then, quantiles from the power distribution are used for predicting current/voltage fluctuations for a given yield. This work shows how to use the proposed model to calculate random decision errors in comparators, jitter in oscillators and phase-locked loops, and the impact of RTN in correlated double sampling circuits.