Abstract
Power converters using deterministic pulse width modulation (PWM) schemes have discrete and high harmonics concentrated at well-defined frequencies. In this study, two random PWM strategies to reduce the harmonic spikes for multilevel cascaded H-bridge (CHB) inverters are proposed. The proposed strategies select two nearest voltage levels to approximate output voltage based on simple geometrical calculations and randomly vary the pulse position of output voltage by choosing a random output instant of two nearest levels. The first proposed strategy provides two discrete pulse positions and one of them is selected by a random bit. The continuous varying of pulse position is generated in the second strategy, where a random interval varying from zero to sampling period is used to delay the beginning instant of pulse position. A maximum degree of freedom can be achieved in the second proposed strategy with lower harmonic spikes but higher commutation frequency, in comparison with the first strategy. A five-level CHB inverter controlled by TMS320F28335 DSP is tested and the experimental results compared with the deterministic PWM strategy validate the proposed strategies.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
