Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach

Abstract

This paper proposes the implementation of fully-parallel radix-2 Decimation in Time (DIT) Fast Fourier Transform - FFT, using the Matrix- Multiple Constant Multiplication (M-MCM) at gate level. In the FFT algorithm, the butterfly plays a central role in the complex multiplications by constants. The use of the Matrix-MCM approach can reduce significantly the impact of real and imaginary multiplications by constants. In this work, for each stage of the real and imaginary parts of the butterflies, we maximize the sharing of the partial products of the coefficients using M-MCM. The experimental results show that 58% and 74% reduction in area and power dissipation respectively can be obtained by using the M-MCM approach when the FFT designs are synthesized using the CADENCE Encounter RTL Compiler under the UMC 130nm technology.