Abstract
In this paper, the authors introduced an approach for single-word multiple-bit upsets (SMU) correction in SRAM. This approach uses the combination of built in current sensor (BICS) and Hamming single error correction/double error detection (SEC/DED) codes. The BICS is used with memory columns for online detection of upsets. When the upset is detected by the BICS, an immediate error correction is performed by the ECC. If ECC gives flag for uncorrectable error i.e. double or more errors in single word, then information from BICS is used to invert the data read from columns flagged by the BICS.
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