Radiation Hardened N-Buried Channel CCD's Using Backside Phosphorus Gettering

Abstract

This paper describes the ionizing radiation effects on 4-phase n-buried channel 128 bit CCD shift registers with a polysilicon overlapping polysilicon gate structure which were fabricated with a radiation hardened process plus backside phosphorus gettering. These CCDs have the state of the art performance with the charge transfer efficiency better than 0.99995, and 5 nA/cm2 dark current density. They are operable to doses of at least 1X106 rads without changing any biasing conditions. The threshold voltage shifts are <|-1.8|V for the buried polysilicon gate MOSFETs, and <|-0.4|V for the surface polysilicon gate MOSFETs. The CTE is better than 0.9999 after 1X106 rads. The dark current increases to 110 nA/cm2 for +10V gate bias, and 55 nA/cm2 for OV gate bias.