Abstract

The Coordinate Rotation Digital Computer algorithm (CORDIC) is a simple mechanism to compute a set of elementary functions, such as trigonometric functions, using fixed-point devices. It is widely adopted, also in applications running in harsh environments such as space, where radiation is a cause of errors in nanoelectronic devices. A single event upset in a configuration bit of a Field Programmable Gate Array (FPGA) can completely change the behavior of the implemented circuit, so it is important to detect and reconfigure the FPGA when this happens. Dual modular redundancy is the typical method to detect errors in electronic circuits, but it has an important overhead in area and power consumption and it does not provide any additional functionality apart from the activation of the FPGA reconfiguration trigger in presence of error. This paper presents two ad-hoc techniques to protect the Digital Direct Synthesizer with CORDIC when it is implemented into an FPGA, with limited overhead in terms of area and power consumption when compared with the traditional solution. The first solution slightly increases the percentage of undetected errors, about 11%, reducing to almost half the area overhead of the circuit. The second solution introduces a trade-off between the percentage of error detection and the precision of the trigonometric output of the CORDIC by means of a polymorphic structure with lower area resources than the existing solutions. This last proposal allows the system to increase the precision of the digital synthesis signal under absence of errors or to activate the error protection in scenarios with external disturbances such as radiation.

Highlights

  • The Coordinate Rotation Digital Computer (CORDIC) algorithm [1] is a hardware efficient algorithm that can compute a set of elementary functions [2] including trigonometric and logarithmic functions, complex number multiplication and division, or matrix inversion

  • The power of the CORDIC algorithm relies on the fact that it can be implemented in fixed-point devices such as Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) [3]

  • EXPERIMENTAL SETUP The protection circuits described in the previous section, as well as the unprotected CORDIC parallel architecture shown in Fig. 2 with 10 stages have been designed using VHDL and implemented in an Digilent Nexys 4 DDR Artix-7 FPGA

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Summary

Introduction

The Coordinate Rotation Digital Computer (CORDIC) algorithm [1] is a hardware efficient algorithm that can compute a set of elementary functions [2] including trigonometric and logarithmic functions, complex number multiplication and division, or matrix inversion. Digital Quadrature Amplitude Modulation (QAM) transceivers require a CORDIC module to digitally down-convert the received signals to intermediate frequencies or base-band (i.e. digital mixer), and heterodyne receivers, which are extensively used in satellites, use it for the frequency synthesizers. Another example of the current and future use of the CORDIC algorithm is the Laser Interferometer Space Antenna (LISA) gravitational wave interferometer that will use a CORDIC-based phase-meter to compute the optical path length differences [12], [13]

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