Abstract

Multiplexer plays a dynamic role in the optimization of a digital circuit (FPGA, ALU and memory circuits etc) implementations. Due to continuous Scaling of CMOS device, has already reached to the minimum transistor size, hence , it is not possible to reduce the transistor dimensions further without scaling issues and functionality affect. QCA is one of the emerging and promising new nanotechnologies and is suitable to replace conventional CMOS technology, and potentially able to solve the physical limitations and challenges of CMOS scaling issues. In this paper, the proposed 2:1 multiplexer structure makes the use of inherent characteristics of QCA cells to act as an efficient multiplexer. The proposed QCA based multiplexer architecture improves 50% of design area, 29% of cell count and 75% of the cost when compared with the earlier designed best multiplexer architectures. Higher order multiplexers 4:1 and 8:1 are also designed using proposed 2:1 multiplexer which improved performance to a greater extent relative to existing efficient multiplexer architectures. The design and simulation of circuits have been performed using software tool QCA Designer Version 2.0.3.

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