Quasi-linear vacancy dynamics modeling and circuit analysis of the bipolar memristor.

Isaac Abraham

doi:10.1371/journal.pone.0111607

Abstract

The quasi-linear transport equation is investigated for modeling the bipolar memory resistor. The solution accommodates vacancy and circuit level perspectives on memristance. For the first time in literature the component resistors that constitute the contemporary dual variable resistor circuit model are quantified using vacancy parameters and derived from a governing partial differential equation. The model describes known memristor dynamics even as it generates new insight about vacancy migration, bottlenecks to switching speed and elucidates subtle relationships between switching resistance range and device parameters. The model is shown to comply with Chua's generalized equations for the memristor. Independent experimental results are used throughout, to validate the insights obtained from the model. The paper concludes by implementing a memristor-capacitor filter and compares its performance to a reference resistor-capacitor filter to demonstrate that the model is usable for practical circuit analysis.

Highlights

MEMRISTIVE dynamics in chemicals has been reported in experimental literature from at least the late 1960s in conjunction with the study of thin films [1]
The vacancy symmetry boundary is different from the accumulation boundary in that it always locates itself inside the device boundary
This paper presents a governing partial differential equation (PDE) and analytical solution by which the contemporary high level dual variable resistor abstraction of the memristor from HP’s Strukov and Williams is shown related to vacancy dynamics

Summary

Introduction

MEMRISTIVE dynamics in chemicals has been reported in experimental literature from at least the late 1960s in conjunction with the study of thin films [1]. The mathematics behind the memristor was presented by Chua in 1971 [2]. The device consists of two metal end plates with a chemical sandwich that has mobile vacancies referred to as defects. Gathering the vacancies to any one end plate results in a high resistance and distributing them makes the device exhibit low resistance [3]. Choosing the right chemical species to provide the mobile vacancies makes it possible to integrate the device into a CMOS substrate. The possibility of integration with CMOS technologies combined with the dimension scalability make them good candidates for use as high-density memory elements, where the low and high resistance states can represent binary data

Methods

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Discussion

Conclusion