Abstract
AbstractThe performance of InGaAs HEMTs with gate length (Lg) scaled down to 10 nm is estimated using quantum‐corrected Monte Carlo (MC) simulations. Thinner gate barrier results in better scaling properties. A nearly universal relationship of subthreshold slope (S) and DIBL on a scaling parameter (γ) that represents the aspect ratio of Lg and characteristics length (λ) can be seen. After further optimization to reduce λ, through a reduction in barrier and/or channel thickness, the InGaAs HEMT could become a likely candidate to enter the CMOS roadmap beyond Si. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
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