Abstract
AbstractEver since the discussions about a possible quantum computer arised, quantum simulations have been at the forefront of possible utilities, with the task of quantum simulations being one that promises quantum advantage. Recently, advancements have made it feasible to simulate complex molecules using Variational Quantum Eigensolvers or study the dynamics of many‐body spin Hamiltonians. These simulations have the potential to yield valuable outcomes through the application of error mitigation techniques. Simulating smaller models carries a great amount of importance as well and currently, in the Noisy Intermediate Scale Quantum era, is more feasible since it is less prone to errors. The objective of this work is to examine the theoretical background and the circuit implementation of a quantum tunneling simulation, with an emphasis on hardware considerations. This study presents the theoretical background required for such implementation and highlights the main stages of its development. By building on classic approaches of quantum tunneling simulations, this study aims at improving the result of such simulations by employing error mitigation techniques, Zero Noise Extrapolation, and Readout Error Mitigation and uses them in conjunction with multiprogramming of the quantum chip, a technique used for solving the hardware under‐utilization problem that arises in such contexts.
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