Quantum Ternary Multiplication Gate (QTMG): Toward Quantum Ternary Multiplier and a New Realization for Ternary Toffoli Gate

Abstract

The designs using ternary logic exploit its logarithmic reduction in the number of qudits compared with the binary circuits. In this paper, we propose quantum ternary multiplication gate. We term it as QTMG. Then we present the symbol and the realization of QTMG. Researchers will be able to use this gate as well as its symbol and realizations in their future studies. We also present a new realization of ternary Toffoli gate in specific state. Moreover, in this paper, we propose 1-qutrit multiplier circuit. The symbol and the realization of the proposed 1-qutrit multiplier circuit are also provided. Afterward, we proposed ternary partial products generation circuit (TPPG) and summation network circuit in order to design quantum ternary 2-qutrit multiplier circuit. Overall, the proposed design of QTMG in this paper is suggested for the first time. In addition, the proposed realization of ternary Toffoli gate, TPPG, summation network and 2-qutrit multiplier circuits are compared with the existing designs and the improvements are reported. The proposed gate and circuits are realized using macro-level ternary gates which are built on the top of the ion-trap realizable 1-qutrit gates and 2-qutrit Muthukrishnan–Stroud gates.