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Abstract
In this paper, we have examined the effect of quantum confinement of carriers on the threshold voltage of strained-silicon (s- Si ) nanoscale Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). Using results from quantum theory and two-dimensional simulation, we show that strain-induced threshold voltage roll-off in s- Si nanoscale MOSFETs can be overcome by decreasing s- Si layer thickness. Based on our simulation study, we provide an optimization between threshold voltage, strain and s- Si layer thickness.
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