Abstract
This paper presents a VHDL-based simulated fault injection (SFI) methodology for quantum circuits. The main objective is to attain a high error modeling capability at a technology independent level. For this purpose, gate level simulation models for quantum circuits have been developed using VHDL. The proposed methodology relies on specific techniques inspired from the simulated fault injection techniques developed for classical CMOS circuits: saboteurs and mutants. In order to perform the simulation campaigns, a library of quantum gates and simulated fault injection components has been developed. The simulation results show that a wide range of quantum faults and error models has been addressed. Furthermore, a comparison between the two SFI techniques is presented.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
