Abstract
SummaryIn this paper, we investigate the application of the direct ΔΣ receiver (DDSR) concept in a mixer‐first architecture. Specifically, we analyze the degrading effects of quantization noise (Qn) upconversion on DDSR sensitivity, which is a major concern in mixer‐first DDSR architecture. We demonstrate that with the chosen approach, the mixer‐first architecture is suitable for the DDSR despite the potential challenges arising from Qn upconversion. A systematic modeling and understanding of Qn upconversion effects is presented, which lead to simple design guidelines. The results demonstrate that a first‐order low‐pass Qn filtering is sufficient in most cases for mixer‐first DDSR implementations. Based on analytical results, we design a transistor‐level mixer‐first DDSR by merging the functionality of N‐path capacitors both as channel select and Qn filters. Simulations performed in a 28‐nm complementary metal‐oxideŰsemiconductor (CMOS) process show a mere 1.5‐dB degradation from maximum signal‐to‐noise and distortion ratio (SNDR) for the worst‐case scenarios arising from Qn upconversion effects, validating the chosen approach.
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More From: International Journal of Circuit Theory and Applications
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