Abstract

Electron transport behaviour in InSb semiconductor significantly changes when the conduction is restricted to two-dimensions. Semiconductor materials are an effective tools to characterize the electron transport in this aspect because the energy separation between transverse modes in a low-dimensional semiconductor device are always inversely proportional to the effective mass, in the same way as for sub-bands in a parabolic potential. Therefore, in this article, a range of novel device geometries were designed, fabricated and characterized to investigate ballistic transport of electrons in low-dimensional InSb structures using surface gated devices to restrict the degrees of freedom (dimensionality) of the active conducting channel. In this framework, designs of gates (i.e., line, loop and solid discussed later) have been used over a range of gate dimensions. Consistent measurement of quantised conductance would be promising for both low power electronics and low temperature transport physics where split gates are typically used for charge sensing. This article presents an experimental results of quantization conductance obtained for the range geometries of novel gates, and some model consideration of the implications of the material choice. Furthermore, the etching techniques (wet and dry) exhibited a significant decrease of ohmic contact resistance from around 35kΩ to only roughly 250Ω at room temperature. Interestingly a possible 0.7 anomaly conduction was observed with a loop gate structure. This work showed perfectly that the two-dimensional electron gases can be formed in narrow gap InSb QWs which makes this configuration device promising candidate for topological quantum computing and next generation integrated circuit applications. Keywords: Quantization conductance, InSb QW, 2DEG, spilt gate structure, ballistic transport.

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