Abstract
Significant improvements in terms of reduced power consumption and increased bandwidth are obtained if a digital predistortion linearizer is implemented with an application specific digital signal processor. This paper investigates the quantization effects in different parts of a table based complex gain predistortion linearizer. The analysis can be used to optimize the predistortion linearizer with respect to word length based on the knowledge of the RF amplifier gain characteristic, the probability density function for the modulation scheme and the maximum allowable adjacent channel interference level. A predistorter chip is described that has been designed using the analysis. The chip has been fabricated and tested. Compared with a standard digital signal processing (DSP) solution it provides seven times higher bandwidth but consumes only 10% of the power.
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