Qualification of DIRICH readout chain

Abstract

The DIRICH front-end board (FEB) is a 32+1 channel FPGA based TDC readout module for Multianode Photomultipliers (MAPMT), and also Multianode MCPs. Due to its low cost and excellent timing precision in single photon measurement applications it will be used in the RICH detector of the Compressed Baryonic Matter (CBM) experiment at the future FAIR facility at GSI Darmstadt, Germany.In the regions of highest photon density at the CBM RICH one expects an average hit rate of ≃300 kHz per MAPMT pixel (6 mm × 6 mm) and ∼15% occupancy for minimum bias Au+Au collisions at 35 A GeV at an interaction rate of 10 MHz. In order to validate the high-rate capability of the DIRICH readout, a dedicated lab setup simulating realistic detector signals by employing a pulsed picosecond laser light source in combination with a constant current driven LED was commissioned. In this paper the setup is introduced and first results are discussed. We show that individual readout channels can withstand photon rates up to 2.2 MHz per pixel, limited only by maximum data rate capability and buffer size on the front-end board. Using the same setup, also effects of high photon occupancy on the MAPMTs are investigated, which might cause additional signals due to capacitive cross-talk within the MAPMT or readout chain. Occupancies of up to 55% (simultaneous photon hits on more than half of the MAPMT pixels) are investigated, indicating that in the expected occupancy range of 10%–15% the readout works flawlessly with very low cross-talk.