Quadratic Differential and Integration Technique in $V^{2}$ Control Buck Converter With Small ESR Capacitor

Abstract

This paper proposes a quadratic differential and integration (QDI) technique for the design of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control buck converters with small equivalent series resistance (ESR) of the output capacitor. The QDI technique, which eliminates the use of large ESR in the <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control structure, achieves the fast transient response with the small output voltage variation in transient period. Besides, the precise sensing signal is derived from the QDI circuit without the unwilling ESR-related distortion. Moreover, the loop analysis demonstrates that the proposed QDI circuit and the proportional and integral compensator can generate the compensation zero pair to stabilize the system. Experimental results show that the output voltage has small voltage ripple opposite to the conventional <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control. In load transient period, the overshoot/undershoot voltage is smaller than 40 mV when output voltage is 2 V, and the transient recovery time inheriting the advantage of <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> control is shorter than 9 ¿s with the load step from 100 to 400 mA and <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">vice versa</i> . The highest full chip power conversion efficiency is about 93%.