PVT-Insensitive Ka-Band Class-D VCO with Average Current Control in 65 nm CMOS

Abstract

In this paper, a PVT (process, voltage and temperature)-insensitive Ka-Band Class-D VCO with average current control in 65 nm CMOS process is presented. The proposed VCO is based on a Class-D VCO architecture to achieve good noise performance and low power consumption. Different from the traditional structure, a tail current source is added to control the average operation current of the VCO. This structure can achieve a stable VCO performance against PVT variations. And the output phase noise of the VCO is immune to the noise and ripples on the external power supply owing to the power supply rejection characteristic of the current source. Moreover, a typical internal power supply circuit is introduced and a minor improvement is addressed to realize the current source without deteriorating the total VCO phase noise. Quantitative analysis and simulation indicate that the proposed structure removes the strict requirements to the power supply circuits comparing to the traditional scheme. The experimental results show that at the frequency of 34.5 GHz, the phase noise of the proposed VCO is - 98 dBc/Hz at 1 MHz offset with the power supply circuit, the core power is 1.7 mW, and the core area is 0.09 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .