Pushing Adaptive Voltage Scaling Fully on Chip

Abstract

In this paper, we investigate the possibility for low-power applications to integrate an efficient Adaptive Voltage Scaling (AVS) system on chip. Therefore the impact of process (both global and local), voltage and temperature variations is firstly studied on two typical low-power circuits i.e., a mobile processor and a wireless sensor node. In order to ensure safe operation under all conditions, it is required to increase the supply voltage by up to 22% leading to a nearly 50% increase in dynamic power consumption when compared to theoretical operating conditions. AVS allows for reducing the supply voltage guard band. To be able to include the AVS system on chip using standard CMOS, this paper proposes to use a switched-capacitor network for DC/DC conversion from the higher battery voltage. A critical path replica is used for both sensing the circuit maximum operating frequency and generating its clock signal. We show that the voltage ripple induced by the DC/DC converter does not significantly contribute to the supply voltage guard band, and that overall the proposed AVS system allows a reduction by up to 80% of this guard band while consuming less than 33% of the total circuit area.