Abstract

In the semiconductor industry, demands for decrease in the line/space dimensions of circuits in IC substrates are ever increasing. Since 2014, line/space dimensions below 10µm/10µm are expected to be used in IC substrates for CPU. Conventional photolithography-based technologies are widely agreed to be reaching their capability limits. To overcome this limitation, the embedded circuit fabrication technology using laser ablation has been recently developed. In this paper, we used a nanosecond UV laser and a picosecond UV laser to fabricate embedded circuit patterns into a buildup film with ceramic fillers SiO2. We conducted SEM and EDS analyses to investigate surface quality of the patterns. Experiments showed that due to the higher recoil pressure, picosecond UV laser ablation of the buildup film generated a better surface finish which is important for the following Cu electroplating.In the semiconductor industry, demands for decrease in the line/space dimensions of circuits in IC substrates are ever increasing. Since 2014, line/space dimensions below 10µm/10µm are expected to be used in IC substrates for CPU. Conventional photolithography-based technologies are widely agreed to be reaching their capability limits. To overcome this limitation, the embedded circuit fabrication technology using laser ablation has been recently developed. In this paper, we used a nanosecond UV laser and a picosecond UV laser to fabricate embedded circuit patterns into a buildup film with ceramic fillers SiO2. We conducted SEM and EDS analyses to investigate surface quality of the patterns. Experiments showed that due to the higher recoil pressure, picosecond UV laser ablation of the buildup film generated a better surface finish which is important for the following Cu electroplating.

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