PUF-CIM: SRAM-Based Compute-In-Memory With Zero Bit-Error-Rate Physical Unclonable Function for Lightweight Secure Edge Computing

Abstract

With the rapid development of the Internet of Things (IoT), compute-in-memory (CIM) is a promising candidate for edge computing, which eliminates the need for frequent data transfer between the memory and processing units. On one hand, CIM provides an efficient approach to achieve deep neural network (DNN) inference; on the other hand, its security issues such as model leakage are ignored in most of state-of-the-art studies. In the resource-limited conditions, it is essential to develop a lightweight secure scheme for CIM without significantly sacrificing its performance. In this work, a physical unclonable function (PUF)-CIM macro based on static random access memory (SRAM) is proposed for lightweight model protection. An SRAM-based PUF extracts unique and stable keys from the mismatch of multirow discharge rate and further achieves zero bit error rate (BER) under temperature and voltage fluctuations by the on-chip masking technique. Besides, we propose a 10T SRAM bit cell to perform xor operation and multiply-and-accumulate (MAC) operation in the same cell, which avoids weight movement during encryption and decryption. The whole process including key generation, xor encryption, and ciphertext MAC operation has been realized. The test chip is designed and fabricated in a 55-nm CMOS process. Experimental results show that the proposed PUF with on-chip masking can provide zero unstable bits and BER under temperature and voltage variations. The proposed PUF-CIM achieves 96.20% inference accuracy in MNIST. Besides, it presents 93.35–121.38-TOPS/W energy efficiency and 1324.24-GOPS throughput. Compared with the normal CIM, the proposed PUF-CIM can enhance AI model security, only with accuracy loss of 1% and energy efficiency degradation of 16.1%.