Abstract
The drain-extended NMOS (DeNMOS) is a low-voltage power MOSFET. It comprises intrinsic parasitic BJT (P-BJT), which can trigger under the influence of lattice heating or avalanche-generated holes. The parasitic bipolar current and self-heating effect (SHE) facilitates the second breakdown phenomena near the drain. Hence, we proposed DeNMOS with a P-type trench gate (PTG) placed between the body and source contact to optimize the P-BJT and SHE at high current conditions using the Sentaurus TCAD simulator tool. The PTG increases hole accumulation within the P-body region to optimize the bipolar effect. Furthermore, the proposed DeNMOS (PTG_DeNMOS) structure incorporates an additional heat dissipation path, improving the thermal stability of the device. It is shown that mitigating the P-BJT enhances the device avalanche ruggedness and unclamped inductive switching (UIS) reliability at high current conditions. The analyzed results show that the proposed PTG_DeNMOS ensures UIS reliability at a peak current density 35% higher than the conventional DeNMOS (C_DeNMOS) without compromising mixed signal performance.
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