PSOI pLDMOS with n‐buried layer

Abstract

Partial-silicon (Si)-on-insulator p-channel lateral double-diffused metal–oxide–semiconductor field-effect transistor with n-buried layer (NBL PSOI pLDMOS) is proposed. One feature of the device is an Si window under the drain offers a heat conduction path to alleviate the self-heating effect. Meanwhile, a fully depleted NBL on the bottom surface of the Si layer provides a large amount of ionised donors to enhance the electric field of the buried oxide (BOX) layer. The NBL can prevent the substrate leakage phenomenon of the PSOI pLDMOS. There is a triple reduced surface field structure in the p-drift region. Some equipotential lines spread into the p-substrate through the Si window. Furthermore, the assistant depletion caused by the NBL increases the p-drift region concentration, which achieves a lower specific on-resistance (R on,sp). With 20 µm p-drift region length and 1 µm BOX thickness, the NBL PSOI pLDMOS obtains a higher breakdown voltage (BV) of 289 V, which is increased by 88.9 and 43.8% compared with the Con SOI and NBL SOI pLDMOS, respectively. The R on,sp is decreased by 82.3 and 17.2%, respectively. The figure of merit (FOM = BV2/R on,sp) is 1.65 MW cm−2. A lower maximum surface temperature of 312.3 K is obtained.