Abstract
BackgroundThe hardware accelerators will provide solutions to computationally complex problems in bioinformatics fields. However, the effect of acceleration depends on the nature of the application, thus selection of an appropriate accelerator requires some consideration.ResultsIn the present study, we compared the effects of acceleration using graphics processing unit (GPU) and many integrated core (MIC) on the speed of fast Fourier transform (FFT)-based protein-protein docking calculation. The GPU implementation performed the protein-protein docking calculations approximately five times faster than the MIC offload mode implementation. The MIC native mode implementation has the advantage in the implementation costs. However, the performance was worse with larger protein pairs because of memory limitations.ConclusionThe results suggest that GPU is more suitable than MIC for accelerating FFT-based protein-protein docking applications.
Highlights
Many recently developed hardware accelerators, such as ClearSpeed, Cell Accelerator Board, and GRAPE, were developed for specific purposes, but graphics processing units (GPUs) have currently become the most popular because of their excellent performance and simple programming environments, such as NVIDIA’s CUDA and OpenCL [1].Many integrated core (MIC) architectures are hardware accelerators developed by Intel, which have been released recently as the Xeon Phi co-processor
We evaluated the performance of GPU and MIC using protein-protein docking calculations, which is a real-world application in computational biology
We used the following five conditions in the comparisons: docking calculation using one CPU core (“1CPU”), docking calculation using an OpenMP implementation and the eight CPU cores included in a CPU socket (“8CPUs”), GPU-accelerated docking calculation using one GPU and one CPU core (“GPU”), docking calculation accelerated by the MIC offload mode implementation using one MIC and one CPU core (“MICoffload”), and docking calculation executed on a MIC using an OpenMP implementation and the MIC native mode (“MICnative”)
Summary
Many recently developed hardware accelerators, such as ClearSpeed, Cell Accelerator Board, and GRAPE, were developed for specific purposes, but graphics processing units (GPUs) have currently become the most popular because of their excellent performance and simple programming environments, such as NVIDIA’s CUDA and OpenCL [1]. Many integrated core (MIC) architectures are hardware accelerators developed by Intel, which have been released recently as the Xeon Phi co-processor. MIC is one of the main architectures used in current supercomputing systems [2]. Tianhe-2 at the National Super Computer Center in Guangzhou, China, has 48,000 MIC boards and it was the “fastest” supercomputer in the world in June 2014 [3]. The actual applications should be considered during evaluations of hardware accelerators. The effect of acceleration depends on the nature of the application, selection of an appropriate accelerator requires some consideration
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