ProHos-1 — A vector processor for the efficient estimation of higher-order moments

Abstract

Higher-order statistics (HOS) are a powerful analysis tool in digital signal processing. The most difficult task to use it effectively is the estimation of higher-order moments of sampled data taken from real systems. For applications that require real-time processing, the performance achieved by common microprocessors or digital signal processors is not good enough to carry out the large number of calculations needed for their estimation. This paper presents ProHos-1, an experimental vector processor for the estimation of the higher-order moments up to the fourth-order. The processor's architecture exploits the structure of the algorithm, to process in parallel four vectors of the input data in a pipelined fashion, executing the equivalent to 11 operations in each clock cycle. The design of dedicated control circuits led to high clock rate and small hardware complexity, thus suitable for implementation as an ASIC (Application Specific Integrated Circuit).KeywordsShared MemoryClock CycleFinite State MachineCache MemoryApplication Specific Integrate CircuitThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.