Abstract

Phase change memory (PCM) is considered as the most promising alternative of DRAM. However, it has the inevitable endurance problem of the storage cells. The limited endurance and other permanent faults cause serious reliability and yield challenges. Conventional techniques like hard repair schemes and error correction codes (ECC) are usually used to overcome these dilemmas. However, since soft errors are not a main threat for PCM, equipping ECC for each data word will waste a lot of memory space for storing the check bits. Therefore, progressive ECC techniques are proposed to solve this drawback in this paper. The main idea is to equip ECC for data words when their first faulty bits are detected. That is, only the fault detection code is equipped for data words such that the original code rate is high. A separated ECC DRAM is used for storing the check bits. Two types of progressive ECC techniques¾the local progressive ECC (LPE) technique and the global progressive ECC (GPE) technique are presented. The proposed techniques are also easy to be integrated with the conventional BISR (Built-in Self-repair) architectures. According to experimental results, the degradation of repair rate and reliability are almost negligible. However, the hardware overhead is at least 70% lower than the original ECC technique.

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