Progress in Ultra-Low Noise Hybrid and Monolithic FPAs for Visible and Infrared

Abstract

Deep sub-micron (≤0.25 μm) CMOS enables the existence of imaging sensors with lower noise at higher video frequencies and lower power dissipation than previously possible. This CMOS-based imaging System-on-Chip (i-SoC) technology hence produces large monolithic and hybrid Focal Plane Arrays (FPAs) that outperform competing CCD-based imaging sensors. The hybrid approach produces visible 20482 FPAs and 40962 mosaics with ∼ 5e− read noise at 1 MHz and quantum efficiency >80% from 390 nm to 930 nm. The monolithic approach produces visible 12-bit imaging system-on-chips such as a 1936 by 1088 with higher quantum efficiency than mainstream CCDs, <25e− read noise at 75 MHz and power dissipation <180 mW.