Progress in the development and understanding of advanced low k and ultralow k dielectrics for very large-scale integrated interconnects—State of the art

Abstract

The improved performance of the semiconductor microprocessors was achieved for several decades by continuous scaling of the device dimensions while using the same materials for all device generations. At the 0.25 μm technology node, the interconnect of the integrated circuit (IC) became the bottleneck to the improvement of IC performance. One solution was introduction of new materials to reduce the interconnect resistance-capacitance. After the replacement of Al with Cu in 1997, the inter- and intralevel dielectric insulator of the interconnect (ILD), SiO2, was replaced about 7 years later with the low dielectric constant (low-k) SiCOH at the 90 nm node. The subsequent scaling of the devices required the development of ultralow-k porous pSiCOH to maintain the capacitance of the interconnect as low as possible. The composition and porosity of pSiCOH dielectrics affected, among others, the resistance of the dielectrics to damage during integration processing and reduced their mechanical strength, thereby affecting the reliability of the VLSI microprocessor. New ILDs had to be developed to overcome such problems and enable the fabrication of reliable high performance devices. The capacitance of the interconnect is also affected by the dielectric caps separating the Cu conductor from the ILD. This effect has increasing impact as interconnect dimensions shrink further with each technology node. New caps with lower k values and smaller thickness have been developed to reduce the impact of the caps to the capacitance of the interconnect and enable fabrication of devices of high reliability. This paper reviews the development of advanced ultralow-k (ULK) ILD dielectrics and caps with reduced capacitance contributions and presents the state of the art of these interconnect dielectrics.