Progress in hybrid-silicon photonic integrated circuit technology

Abstract

Progress in hybrid-silicon photonic integrated circuit technology Martijn J. R. Heck, Michael L. Davenport, and John E. Bowers Adding III-V materials to the silicon-on-insulator platform enables increasingly complex devices, making it well-positioned to address energy-efficient, compact, and low-cost photonic applications. Photonic integration is the technology that allows the combi- nation of different optical components, such as lasers, modula- tors, and photodetectors, on a single photonic chip. Such devices are known as photonic integrated circuits (PICs). The prospect of medium- and large-scale integration, with tens to hundreds of components on a single chip, is a major driver for research on silicon photonics in the silicon-on-insulator (SOI) platform. The SOI fabrication infrastructure is compatible with the mature and high-quality CMOS technology, which is robust and repro- ducible and has high yield. It is possible to make PICs in the SOI platform on large 200mm-diameter wafers, and this allows for low cost and high volumes. Since these PICs can operate at wavelengths of 1.3 and 1.55 m, prime application candidates are telecommunication and interconnects. 1 The SOI platform offers an almost complete suite of pho- tonic components, including filters, (de)multiplexers, splitters, modulators, and photodetectors. However, electrically pumped efficient sources on silicon remain a challenge due to this substance’s indirect bandgap. The integration of III-V materials, such as indium phosphide (InP), gives the SOI platform access to the complete suite of high-speed and efficient III-V-based photonic components. The hybrid-silicon complex heterogeneously incorporates III-V func- tionality on the SOI platform by means of molecular wafer bonding. 2 Hybrid-silicon III-V waveguides have the proper- ties of the III-V material, such as gain, high-speed modulation, and photodetection, but are still located on an SOI circuit (see Figure 1). We can use tapered-mode converters to change a hy- brid mode into a mode that resides fully in the silicon wave- guide. We can also fabricate the active III-V components with Figure 1. Diagram showing a hybrid-silicon III-V optical amplifier in- tegrated with a silicon waveguide (bottom) and the hybrid waveguide cross section (top). Tapered-mode converters form the interface between the silicon and hybrid waveguide. The optical mode (white) overlaps with both the silicon waveguide and the III-V quantum wells (red). The top p-contact and the lateral n-contacts (yellow) provide electrical current. The device achieves current confinement by ion implanting the p-mesa (dashed). SOI: Silicon on insulator. lithographic precision and alignment accuracy, thereby enabling large-scale integration. This is done in a back-end process af- ter the SOI fabrication, which means we avoid contamination of a CMOS foundry and that the III-V manufacturing is in prin- ciple fully compatible with the SOI-CMOS fabrication proce- dure. The hybrid-silicon platform combines the maturity and scale of CMOS processing and SOI photonics with essential III-V functionality and, as such, is unique and well-positioned for medium-scale photonic integration. The timeline of Figure 2 shows the success of the hybrid- silicon technology, which we developed in collaboration with Continued on next page