Progress and trends in multi-Gbps optical receivers with CMOS integrated photodetectors

Abstract

There has been significant recent progress towards the realization of multi-Gbps optical receivers fully integrated into standard CMOS processes. Although CMOS photodetectors exhibit performance inferior to discrete photodetectors, they offer the potential for a low-cost highly-integrated solution that suits growing and emerging applications in short-reach optical communication. Past work has focused on using the pn-junctions and depletion regions available in standard CMOS process flows to eliminate, minimize, or cancel the slowly diffusing photocarriers that usually limit the bandwidth of CMOS photodetectors. However, if considered simply as a form of ISI, the slowly diffusing carriers can be dealt with using the same signal processing tools in wide use for other wireline communication applications, including decision feedback equalization. A combination of spatially-modulated light detection, analog equalization, and modest decision feedback equalization appears to offer a path towards data rates in excess of 10-Gbps using integrated photodetectors. Nanoscale CMOS is particularly well suited to the implementation of such signal processing functions. Measured results of photodetectors implemented in a standard 65-nm CMOS process are presented.