Abstract
Negative capacitance in ferroelectric materials has been suggested as a solution to reduce the power dissipation of electronics beyond fundamental limits. The discovery of ferroelectricity and negative capacitance in the widely used class of HfO2-based materials has since sparked large research efforts to utilize these effects in ultra-low power transistors. While significant progress has been made in the basic understanding of ferroelectric negative capacitance in recent years, the development of practical devices has seen limited success so far. Here, we present a unique view of the field of negative capacitance electronics from the ferroelectric materials perspective. Starting from the basic principles of ferroelectric negative capacitance, we discuss the desirable characteristics of a negative capacitance material, concluding that HfO2-based ferroelectrics are currently most promising for applications in electronics. However, we emphasize that material non-idealities can complicate and in some cases even inhibit the design and fabrication of practical negative capacitance devices using HfO2-based ferroelectrics. Finally, we review the recent progress on experimental devices and give an outlook on the future direction of the field. In particular, further investigations of the microscopic structure of HfO2-based ferroelectrics are needed to provide an insight into the origin of negative capacitance in this material system and to enable predictive device design.
Highlights
Since the 1960s, this advancement was largely driven by the miniaturization of metal–oxide–semiconductor field-effect transistors (MOSFETs) whose lateral dimensions have reached below 100 nm in the year 2003, marking the beginning of the nanoelectronics era
Due to the Boltzmann distribution of electron energies in the source, there is a fundamental lower limit of 60 mV/dec at room temperature for how much gate voltage Vg is needed to change the drain current Id by a factor of 10.11 Due to this “Boltzmann limit,” the supply voltage cannot be reduced below roughly 0.5 V in conventional MOSFETs, which is not far from 0.7 V used in current technologies; see Fig. 1
While this simple energy landscape model neglects the important effects of domain nucleation and growth, it is still useful to illustrate many of the basic physics of ferroelectric negative capacitance (NC)
Summary
The energy efficiency of computation has seen a remarkable trend of exponential improvement over the past 70 years. Since the 1960s, this advancement was largely driven by the miniaturization of metal–oxide–semiconductor field-effect transistors (MOSFETs) whose lateral dimensions have reached below 100 nm in the year 2003, marking the beginning of the nanoelectronics era. Since further improvements have been enabled by materials innovations (e.g., strain engineering and gate oxides with high relative permittivity εr) and the adoption of new device concepts (FinFET and fully depleted silicon on insulator technology). in recent years, the energy efficiency improvements in nanoelectronics have begun to slow down as we are approaching practical as well as fundamental physical limits.. In any logic MOSFET, a large-enough ratio between the drain current Id in the on-state and in the off-state must be ensured to achieve acceptable performance (high Ion) and static power consumption (low Ioff) at the same time; see Fig. 2 As it turns out, due to the Boltzmann distribution of electron energies in the source, there is a fundamental lower limit of 60 mV/dec at room temperature for how much gate voltage Vg is needed to change the drain current Id by a factor of 10.11 Due to this “Boltzmann limit,” the supply voltage cannot be reduced below roughly 0.5 V in conventional MOSFETs, which is not far from 0.7 V used in current technologies; see Fig. 1. In a such a negative capacitance field-effect transistor (NCFET), one could overcome both the impending EOT and the Boltzmann limits to further improve the energy efficiency of electronics
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