Programming pipelined CAD applications on message‐passing architectures

Abstract

AbstractProgramming applications in computer‐aided design of VLSI are difficult on parallel architectures, especially pipelined implementations derived from their sequential counterparts by algorithmic partitioning. The difficulty is primarily due to lack of good program development environments and tools. Our solution, applicable to message‐passing architectures, is based upon a definition of a broad class of non‐linear pipeline configurations and an asynchronous data‐driven model for pipeline stage interactions. It provides object‐oriented definitions of stages and interconnecting channels. These objects are embedded in C++ so that the correctness of application programs can be tested on a workstation in a simulated environment. The simulation is instrumented to provide data useful in assessing relative computational loading and balancing of stages. Thus a large part of program development can take place in the environment of a workstation familiar to the programmer. A non‐trivial application is developed to illustrate these ideas.