Abstract
Sense-Switch pFlash is a common floating gate switching cell with the advantages of high integration, natural field-edge total dose radiation hardness, and high reliability. It is the core configuration cell of the field-programmable gate array (FPGA), and it can be used to realize radiation-hardened flash-based FPGA circuits. This study investigates the programming mechanism of the Sense-Switch pFlash device with dumbbell structure based on 0.13 μm eFlash technology and analyzes the influences of the device's programming and erasing methods on the threshold characteristics, on/off-state characteristics, and retention characteristics of Sense-Switch pFlash cells. It is found that there are multiple mechanisms in the programming process. Additionally, under certain programming and erasing voltage conditions, the threshold voltage and driving current of programming/erasing state depend on the pulse width, meaning that a fixed pulse width leads to specific threshold voltage and driving current values in the programming and erasing modes, which is called the pulse width modulation effect (PWME). Multi-level storage can be well obtained to expand the application of the Sense-Switch pFlash in the field of computing-in-memory and brain-inspired computing.
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