Abstract
Performance in large-scale shared-memory multiprocessors depends on finding a scalable solution to the memory-latency problem. The author shows that protect consistency (PRC) relaxes previous consistency models with two distinct performance benefits. First, PRC is used to expose and exploit more parallelism in the computation, giving better support to latency tolerance. Second, assuming that visible synchronization directly coordinates changes in the writability of shared data, PRC is used to create more situations where cached data are reusable, giving better support to latency avoidance. The paper evaluates PRC in the context of relaxing intrathread dependences for multithreaded architectures. After the PRC programming notation is described, programming and compiling aspects are examined, and architectural support is discussed. >
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.