Abstract
We propose a model for global register allocation via graph coloring that uses knowledge about program structure to guide global register allocation. We define restrictions that must be met by the live ranges of loops and conditionals such that the corresponding portions of the register conflict graph are interval graphs. This knowledge is used to locate clique separators in register conflict graphs. We discuss how clique separators can be used both to improve sequential register allocation and as a a platform for parallelized global register allocation. We conclude this paper by presenting measurements for a benchmark of C kernels for most of which our method found all clique separators.
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