Program Partitioning for NUMA Multiprocessor Computer Systems

Abstract

Program partitioning and scheduling are essential steps in programming non-shared-memory computer systems. Partitioning is the separation of program operations into sequential tasks, and scheduling is the assignment of tasks to processors. To be effective, automatic methods require an accurate representation of the model of computation and the target architecture. Current partitioning methods assume today′s most prevalent models - macro dataflow and a homogeneous/two-level multicomputer system. Based on communication channels, neither model represents well the emerging class of NUMA multiprocessor computer systems consisting of hierarchical read/write memories. Consequently, the partitions generated by extant methods do not execute well on these systems. In this paper, we extend the conventional graph representation of the macro-dataflow model to enable mapping heuristics to consider the complex conununication options supported by NUMA architectures. We describe two such heuristics. Simulated execution times of program graphs show that our model and heuristics generate higher quality program mappings than current methods for NUMA architectures.